The EtherCAT Master Stack library is especially designed for the use on embedded systems. The master stack achieves best performance with lowest resource usage. As target platforms, small microcontrollers up to industrial PCs are supported. The library is written portable in ANSI-C.
Distributed Clocks (DC): High-precision clock synchronization for DC slaves: Synchronous writing of outputs and reading of inputs throughout the entire EtherCAT network. Achieved accuracy significantly below 1 µs (typical: 20…30 ns)
Cable Redundancy (Basic functions und diagnosis functions)
EtherCAT network configuration (ENI) either via the integrated XML parser or via generated source code
EtherCAT State Machine (ESM), fast network startup by parallel initialization of several slaves
Cyclic communication in one or more cyclic tasks with different cycle times
Optimized for speed: The outgoing and incoming process image can be accessed directly in the cyclic frame without the need to additionally copy the data. Macros can be used for high-performance access to the process data.
Acyclic communication: Sending of asynchronous frames with EtherCAT commands by the application
Statistics and error counters, event API for notification of errors in the network
Configurable state monitoring and network monitoring
The software architecture of the stack is modular and offers flexibility for “embedding” into the EtherCAT master application:
The master stack library provides a C API to the application.
An easy integration into existing applications is possible, because the stack does not impose the software architecture to the application.
The master stack library itself is completely passive. The cyclic tasks can be driven by the application. Different approaches for scheduling (single-threaded, multi-threaded) and for synchronization are possible. For example, the application can use a hardware-specific timer or synchronize the tasks to other external events.
Multiple instances of the master stack are possible in one application.
The stack comes with an adaptation layer that allows easy integration of the portable stack and the sample applications on an operating system.
Optional stack features that are not necessary in an application can be removed at compile time to minimize the footprint.
An Ethernet network can be accessed via the network driver of an underlying operating system. Furthermore, optimized link layer drivers with DMA support and “Zero-Copy Buffer Handling” for common Ethernet controllers are available. With this architecture, the master stack achieves optimal performance: cycle times below 100 microseconds are already possible on small platforms.
The icECAT Master Stack comes with useful tooling for development and configuration:
EtherCAT Master Monitor for controlling the state of master and slaves and for displaying and editing process variables. The tool can be started at runtime on the target system or on a remote host (connected via TCP/IP).