icECAT EtherCAT Master Stack v1.6 released
Enhanced Frame Scheduling
Starting with version 1.6 the EtherCAT Master Stack of IBV supports different modes to schedule the sending of EtherCAT frames. Thus, a minimum jitter for cyclic frames can be achieved. Furthermore, the bandwidth of the EtherCAT network can be better utilized with acyclic frames. For example, frames can be appended to the frames of the cyclic task with the highest priority. Alternatively, cyclic and acyclic frames can be scheduled by a separate thread. The scheduling scheme can be specified by the application or determined from the ENI configuration.
The functionality is available for operation with or without an operating system and can therefore also be used on microcontrollers that work “bare-metal”.
Announcement for version 1.7:
- Support of the EtherCAT feature “Cable Redundancy” (FPCR_101 and FPCR_102 according to ETG.1500)
Continuing in preparation:
- Support of Texas Instruments TI-RTOS Real-Time Operating System, e.g. on TI Sitara AM65xx
- Link Layer driver for Intel I225 Ethernet MAC