icECAT EtherCAT Master Stack 1.9 released

From version 1.9, the EtherCAT Master Stack from IBV also supports write and read access to the SII (Slave Information Interface). This allows an ENI file to be created for slave devices by the icECAT EtherCAT Configuration Library, even if no ESI is available.

Furthermore, the sample application has been completely revised and now offers examples for various synchronization modes (DC master mode, DC master mode with TTS, DC slave mode, DC slave mode with TTS) as well as a new performance monitor that outputs key performance indicators.

The master is supported on additional platforms:

• Texas Instruments Sitara AM64x/AM243x, R5F core (PRU-ICSSG bzw. CPSW3G)
• Texas Instruments TDA4x J78S4, R5F core (CPSW2G)
• Texas Instruments AM69 (Standard Link Layer Treiber)
• QNX Neutrino RTOS v7.1

As of version 1.10, the EtherCAT Configuration Library supports the following new features:

• Extended network scan to automatically detect modules from modular slave devices (MDP)
• Readout of the SII as a fallback if no ESI is available
• Export and import of the slave configuration as SCI XML file (Slave Configuration Interface)
• Saving and loading the configuration of individual slave devices

The “icECAT EtherCAT Network Simulator” is a new component in the product family. The extension supports the development and testing of control applications, especially when no physical EtherCAT slave devices are available. Together with the EtherCAT Master Stack, a software-in-the-loop (SiL) simulation of a complete EtherCAT-based control system can be realized.

More information can be found on the product page.